1. Field of the Invention
The invention relates to an activation circuit for activating a power bridge circuit of a resonance converter, which includes an inductive activation transformer that transfers a pulsed control signal generated via a CMOS driver to the power bridge circuit.
2. Description of the Related Art
Resonance converters function without pulse-width modulated (PWM) control. The power bridge circuit is always activated with a full pulse duty factor, where the switching frequency determines the transformation ratio and thus the output voltage.
In order to activate the power bridge circuit in the high voltage range, an inductive activation transformer is required to galvanically separate the control circuit from the power circuit. This activation transformer transfers a control signal to switch the circuit breaker arranged in the power bridge circuit.
The control signal is generally generated by CMOS drivers. Here, the control signal is a sequence of alternating positive and negative pulses with, in each instance, dead times occurring therebetween. The dead time between the pulses of the control signal provides for switching in the case of a zero voltage (Zero Voltage Switching (ZVS)) and protects the circuit breaker from a simultaneous switching-through. Otherwise a short-circuit would result.
A CMOS driver involves two MOSFETs connected in series, where the first MOSFET pulls the CMOS driver output towards a supply voltage and the second MOSFET pulls the CMOS driver output towards a ground potential.
In order to activate a bridge circuit via an activation transformer, two CMOS drivers are required. Their outputs are connected in such cases by a primary winding of the activation transformer. The activation transformer comprises two secondary windings on the secondary side, which are wound mirror-inverted. The pulses that can be tapped on the secondary windings are thus likewise opposite, in other words, a gate pulse is positive, while the gate pulse present on the other secondary winding is negative, and the gate pulse is negative while the gate pulse present on the other secondary winding is positive.
In the case of a switching cycle, the CMOS drivers are switched during a first pulse such that a current flows through the primary winding. For instance, the first MOSFET of the first CMOS driver switches its output to the supply voltage and the second MOSFET of the second CMOS driver switches its output to the ground potential. At the end of this first pulse, all MOSFETs switch off for the predetermined dead time. The second MOSFET of the first CMOS driver then switches its output to the first ground potential during a second pulse, and the first MOSFET of the second CMOS driver switches its output to the supply voltage so that the current flows through the primary winding in the other direction.
In most instances, CMOS drivers are optimized for a direct activation without activation transformers. They are therefore not well suited to driving inductive transformers. An overdimensioning of the CMOS driver in most instances helps. Such a measure is however generally not economical.
Problems arise in particular due to the dead time, during which energy flows from the power bridge circuit back to the CMOS drivers via the activation transformer. With inadequate dimensioning of the CMOS drivers, it may occur that the circuit breakers do not correctly block and that an excessively high gate residual voltage is present as a result of an upright energy flow.
This problem is preferred on account of leakage currents and unfavorable states, such as high temperatures, as a result of which this may finally result in the simultaneous through-switching of the power bridge circuit, which often ends in damage to the circuit on account of a short-circuit.
A further problem consists in a high impedance of the CMOS driver circuit, because two CMOS drivers are connected in series. Oscillations may occur here during switching, which negatively affect the electromagnetic compatibility (EMC).